The present disclosure relates generally to semiconductor device manufacturing, and more particularly to the fabrication methods of thin film transistors used in electro-optical display devices, and the like.
The manufacture of semiconductor integrated circuits (ICs) and devices require the use of many photolithography process steps to define and create specific circuit components and circuit layouts onto an underlying substrate. Conventional photolithography systems project specific circuit and/or component images, defined by a mask pattern reticle, onto a flat substrate coated with a light sensitive film (photoresist) coating. After image exposure, the film is then developed leaving the printed image of the circuit and/or component on the substrate. The imaged substrate is subsequently processed with techniques such as etching and doping to alter the substrate with the transferred pattern. Photolithography processes are used multiple times during the fabrication of thin film field effect transistors (TFTs) that are used in electro-optical display devices and sensors.
Each photolithography process sequence represents invested fabrication costs to the final cost of the completed device. Such fabrication costs include all costs related to materials, labor, facilities, production yield losses and the time spent in the production state. Any process flow simplification that provides a reduction in any of the above mentioned cost areas will provide a net improvement to the final cost of fabricating the device. It is highly desirable to create and implement new process flows that feature process simplifications to lower fabrication costs. The reduction of photolithography process sequences represents a form of process simplification. Such process simplification will provide significant cost improvement for a given production facility to maintain highly competitive cost and output advantages over other manufacturers of similar product devices.
What is desirable is an improved process flow that features process simplifications to lower fabrication costs while maintaining the required physical and electrical performance characteristics of the semiconductor device and components.